- 您现在的位置：买卖IC网 > Sheet目录221 > DS1217M-L04 (Maxim Integrated)RAM READ/WRITE NV LO LEAK 4MEG
DS1217M Nonvolatile Read/Write Cartridge
DC TEST CONDITIONS
Outputs Open
t Cycle = 250ns
All voltages are referenced to ground.
AC TEST CONDITIONS
Output Load: 100pF + 1TTL Gate
Input Pulse Levels: 0 to 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
DETAILED DESCRIPTION
Read Mode
The DS1217M executes a read cycle whenever WE (write enable) is inactive (high) and CE (cartridge enable) is
active (low). The unique address specified by the address inputs (A0–A14) defines which byte of data is to be
accessed. Valid data will be available to the eight data I/O pins within t ACC (access time) after the last address input
signal is stable, provided that CE (cartridge enable) and OE (output enable) access times are also satisfied. If OE
and CE times are not satisfied, then data access must be measured from the late occurring signal ( CE or OE ) and
the limiting parameter is either t CO for CE or t OE for OE rather than address access. Read cycles can only occur
when V CC is greater than 4.5V. When V CC is less than 4.5V, the memory is inhibited and all accesses are ignored.
Write Mode
The DS1217M is in the write mode whenever both the WE and CE signals are in the active (low) state after address
inputs are stable. The last occurring falling edge of either CE or WE will determine the start of the write cycle. The
write cycle is terminated by the first rising edge of either CE or WE . All address inputs must be kept valid
throughout the write cycle. WE must return to the high state for a minimum recovery time (t WR ) before another cycle
can be initiated. The OE control signal should be kept inactive (high) during write cycles to avoid bus contention.
However, if the output bus has been enabled ( CE and OE active), then WE will disable the outputs in t ODW from its
falling edge. Write cycles can only occur when V CC is greater than 4.5 V. When V CC is less than 4.5Vs, the memory
is write-protected.
Data Retention Mode
The nonvolatile cartridge provides full functional capability for V CC greater than 4.5V and guarantees write
protection for V CC less than 4.5V. Data is maintained in the absence of V CC without any additional support circuitry.
The DS1217M constantly monitors V CC . Should the supply voltage decay, the RAM is automatically write-protected
below 4.5V. As V CC falls below approximately 3.0V, the power switching circuit connects a lithium energy source to
RAM to retain data. During power-up, when V CC rises above approximately 3.0V, the power switching circuit
connects the external V CC to the RAM and disconnects the lithium energy source. Normal RAM operation can
resume after V CC exceeds 4.5V.
The DS1217M checks battery status to warn of potential data loss. Each time that V CC power is restored to the
cartridge, the battery voltage is checked with a precision comparator. If the battery supply is less than 2.0V, the
second memory cycle is inhibited. Battery status can, therefore, be determined by performing a read cycle after
power-up to any location in memory, recording that memory location content. A subsequent write cycle can then be
executed to the same memory location, altering data. If the next read cycle fails to verify the written data, the
contents of the memory are questionable.
In many applications, data integrity is paramount. The cartridge thus has redundant batteries and an internal
isolation switch that provides for the connection of two batteries. During battery backup time, the battery with the
highest voltage is selected for use. If one battery fails, the other will automatically take over. The switch between
batteries is transparent to the user. A battery status warning will occur only if both batteries are less than 2.0V.
Bank Switching
Bank switching is accomplished via address lines A8, A9, A10, and A11. Initially, on power-up all banks are
deselected so that multiple cartridges can reside on a common bus. Bank switching requires that a predefined
pattern of 64 bits is matched by sequencing 4 address inputs (A8 through A11) 16 times while ignoring all other
address inputs. Prior to entering the 64-bit pattern, which will set the band switch, a read cycle of 1111 (address
6 of 8
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
DS1904L-F5#
IBUTTON RTC F5 MICROCAN
DS1920-F5+
IBUTTON TEMPERATURE F5
DS1921G-F5#
IBUTTON THERMOCHRON F5
DS1921H-F5#
IBUTTON THERMOCHRON F5
DS1921K#
KIT IBUTTON THERMOCHRON
DS1922E-F5#
IBUTTON TEMP LOGGER 4KBit F5
DS1922L-F5#
IBUTTON TEMP LOGGER
DS1923-F5#
IBUTTON TEMP/HUMIDITY LOGGER F5
相关代理商/技术参数
DS-1217ZJ
制造商:Hikvision USA 功能描述:Dome Camera Pendant Mount9.06In X 7.09In X 6.30 制造商:HIKVISION 功能描述:DOME CAMERA PENDANT MOUNT 9.06IN X 7.09IN X 6.30
DS1218
功能描述:IC CONTROLLER NV 8-DIP RoHS:否 类别:集成电路 (IC) >> 存储器 - 控制器 系列:- 标准包装:45 系列:- 控制器类型:静态 RAM（SRAM） 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件
DS1218+
功能描述:存储器控制器 Nonvolatile Controller RoHS:否 制造商:Maxim Integrated
DS1218B2
制造商:Maxim Integrated Products 功能描述:1218B2
DS1218S
功能描述:IC CONTROLLER NV 8-SOIC RoHS:否 类别:集成电路 (IC) >> 存储器 - 控制器 系列:- 标准包装:45 系列:- 控制器类型:静态 RAM（SRAM） 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件
DS1218S/T&R
制造商:Maxim Integrated Products 功能描述:CONTROLLER NV 8P SOIC T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC CONTROLLER NV 8-SOIC
DS1218S/T&R
功能描述:IC CONTROLLER NV 8-SOIC RoHS:否 类别:集成电路 (IC) >> 存储器 - 控制器 系列:- 标准包装:45 系列:- 控制器类型:静态 RAM（SRAM） 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件
DS1218S+
功能描述:存储器控制器 Nonvolatile Controller RoHS:否 制造商:Maxim Integrated